Design and Simulation of High-Speed Parallel/Sequential Simplified DES Code Breaking Based on FPGA


Zeebaree, S.R.M., Sallow, A.B., Hussan, B.K., Ali, S.M., (2019). Design and Simulation of High-Speed Parallel/Sequential Simplified DES Code Breaking Based on FPGA. 2019 International Conference on Advanced Science and Engineering (ICOASE).

https://ieeexplore.ieee.org/document/8723792

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